Case Studies of Batch Processing Experiments Diane K. Michelson International Sematech Statistical Methods May 21, 2003 Quality and Productivity Research Conference Abstract Experimentation in the semiconductor industry requires clever design and clever analysis. In this paper, we look at two recent experiments performed at ISMT. The first is a split plot design at a clean operation. The second is a strip plot design of 3 factors over 3 process steps. The importance of using the correct error terms in testing the model will be discussed. 2 Split Plot Experiment An experiment was designed to optimize the performance of a wafer cleaning step. Factors were chemical supplier and three process factors (time, temp, concentration). -1 -1 -1 -1 -1 -1 -1 +1 -1 -1 +1 -1 -1 -1 +1 +1 -1 +1 -1 -1 -1 +1 -1 +1

-1 +1 +1 -1 -1 +1 +1 +1 +1 -1 -1 -1 +1 -1 -1 +1 +1 -1 +1 -1 +1 -1 +1 +1 +1 +1 -1 -1 +1 +1 -1 +1 +1 +1 +1 -1 +1 +1 +1 +1 Run 2 Run 3 Run 4 Run 5

Run 6 Run 7 Run 8 Run 9 Run 10 Run 11 Run 12 Run 13 Run 14 Run 15 Run 16 A B C D Run 1 A 24 full factorial (plus centerpoints) was first considered. 3 Completely Randomized Design In the CRD, treatments are randomly assigned to experimental units. The CRD would require 16 bath changes, one for each run. This was not practical, since bath changes are expensive and time-consuming. Engineering wanted to run all treatment combinations using one supplier first in one bath, and all treatment combinations using the second supplier in another bath. 4 What Engineering Wanted RUN 16 RUN 15 RUN 14 RUN 13

RUN 12 RUN 11 RUN 8 RUN 9 RUN 10 A +1 RUN 7 RUN 6 RUN 5 RUN 4 RUN 3 RUN 2 RUN 1 A -1 B C

D 5 Multiple experimental units The split plot design has two (or more) experimental units. The experimental unit for the supplier variable is a bath (whole plot). The experimental unit for the process factors is a wafer (sub plot). Note that supplier is not a blocking factor. 6

Visual Look B=+1,C=+1 B=+1,C=-1 B=+1,C=+1 B=-1,C=+1 B=-1,C=+1 B=-1,C=-1 B=+1,C=-1 B=-1,C=-1 B=-1,C=-1 B=-1,C=+1 B=-1,C=+1 B=+1,C=+1 B=+1,C=-1 B=+1,C=+1 B=-1,C=-1 B=+1,C=-1 A=+1 A=-1 7 Analysis The model is y A B C D AB AC AD BC BD CD Parameter estimates are not affected by the split plot design The error term for testing effects is not necessarily the residual, since there are restrictions on randomization. 8 ANOVA The ANOVA table for an unreplicated split plot design shows that with just one run of each supplier, the supplier effect can not be tested. Source

1 2 3 4 5 6 7 8 9 10 11 12 A whole plot error (reps(A)) B C D A*B A*C A*D B*C B*D C*D sub plot error (residual) df 1 0 1 1 1 1 1 1 1 1 1 5 denominator for statistical tests reps(A) residual residual residual residual residual residual residual residual residual residual 9 Replicated Whole Plots

A -1 A +1 B C D

10 ANOVA for replicated whole plots Replicating the supplier once gives this ANOVA table. Source 1 2 3 4 5 6 7 8 9 10 11 12 A whole plot error (reps(A)) B C D A*B A*C A*D B*C B*D C*D sub plot error (residual) df 1 2 1 1 1

1 1 1 1 1 1 19 denominator for statistical tests reps(A) residual residual residual residual residual residual residual residual residual residual 11 A cheaper option Another choice is to run a fractional factorial within each supplier run. Statistical software will not create this design, in general. It is typically easier to create these designs by hand in a spreadsheet package. A -1 1 A +1 2 3 4 B

C D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

16 A -1 +1 +1 -1 +1 -1 -1 +1 -1 +1 +1 -1 +1 -1 -1 +1 B -1 +1 -1 +1 -1 +1 -1 +1 -1 +1 -1 +1 -1 +1 -1 +1 C -1 -1 +1 +1 -1 -1 +1 +1 -1 -1 +1 +1 -1 -1 +1 +1 D

-1 -1 -1 -1 +1 +1 +1 +1 -1 -1 -1 -1 +1 +1 +1 +1 A_err 1 2 2 1 2 1 1 2 3 4 4 3 4 3 3 4 12 ANOVA for fractioned design ANOVA table for the fractioned design. Note the decrease in residual df. 1 2 3 4 5 6 7 8 9 10 11 12 Source A whole plot error (reps(A)) B C

D A*B A*C A*D B*C B*D C*D sub plot error (residual) df 1 2 1 1 1 1 1 1 1 1 1 3 denominator for statistical tests reps(A) residual residual residual residual residual residual residual residual residual residual Adding 2 centerpoints per supplier run will add 4 df to the residual and allows for a test of curvature of the process factors. 13 Considerations CRD very expensive, since one factor is hard to vary Split plot cheaper, but not as much information on the supplier effect as on the process effects must have replicates of whole plot factor 14 Strip plot experiment Problem: yield issues on Interconnect baseline product Product is a short loop process of Metal 1,

Via, Metal 2 The failing electrical parameter was Via chain yield Yield was fine after M2 but bad after Final Test 15 1052103 1060403 1061803 1062802 1070901 1072301 1072561 1080601 1082001 1090401 1091701 1100259 1100804 1102207 1110504 1112602 1121002 2010202 2012807 2022502 2031219 2031901 2032502 2040204 2040901 2041601 2042301 2043001 2050702 2051401 2052107 2052801 2060401 2061401 Percent Yield drop between M2 and Final Yield of 360k 0.25 um via chains RCON-CCE (CHE) Interconnect Oxide Baseline 800BSL000 (<1 ohm/via) 100 80 60 40

20 0 Metal 2 probe Final probe Lot # 16 Via chains Each measurement represents the resistance of a via chain as measured by forcing a current through the 360,000 via chain, and sensing a voltage. This generates a resistance value for the chain, which is divided by 360,000 to get the per-via resistance. The responses were yield and median resistance of a via in a chain of 360,000 vias. Yield was defined using a 1 ohm criterion for the .25m via diameter. 17 Failure after passivation 18 Process Flow / Factors 19 Dep nit750/ox4k/nit750/ ox7k PECVD 41 Sputter M1Ta250/Cu1.3k 20 Back of wafer clean (Cu) 42 P late M1Cu 7500 A 21 CMP oxide, remove 2kA 43 Anneal copper 150C 30' 22 Back of wafer clean (Cu) 44 CMP copper 23 Via Litho preinspection 45 Electrical test 24 Via Litho (0.25 umtarget) 46 Double sided brush scrub 25 Via:M1Overlaymeasurement 47 Dep 1kA SiN, 2kA SiO2

26 Resist CDs 48 Back of wafer clean (Cu) 27 Via etch to SiN over M1 49 P ad open Litho preinspection 28 Ash resist 50 P ad open Litho (0.25 umtarget) 29 Back of wafer clean (Cu) 51 P ad etch to SiN under 2kA SiO2 mask 30 Final CDs for vias 52 Ash with no exposed Cu 31 M2 Litho preinspection 53 Etch SiN down to Cu 32 M2 Litho (0.25 um target) 54 BPD_LVL 33 M2:Via Overlaymeasurement 54 Sputter M1TaN 400A 34 Resist CDs 55 Sputter 7.5kA Al-Cu 35 M2 etch to SiN under M2 56 Back of wafer clean (Cu) 36 Ash, remove BARC fromvia 57 P ad metal Litho preinspection 37 Etch nitride fromvia and trench bottom 58 P ad metal Litho (0.25 umtarget) 38 Wet clean vias 59 P ad metal etch 39 Back of wafer clean (Cu) 60 Solvent clean

40 Final CDs for M2 trench 61 380 C Forming gas anneal 62 Electrical test 19 Design Three factors, each at 2 levels, plus centerpoints 23 full factorial. If run as a Completely Randomized Design, this experiment would use 10 wafers, and 10 runs. Wafers are not batched. Run 1 2 3 4 5 6 7 8 9 10 Nitride Sputter Ash Time Etch Time Etch Time 0 0 0 -1 -1 -1 -1 -1 1 -1 1 -1 -1 1 1 1 -1 -1 1 -1 1 1 1 -1

1 1 1 0 0 0 20 Design 15 10 Yield Drop Engineering wanted to batch wafers together at each step. Using just 10 wafers would mean 3 runs of each tool, one for each level of the factor. Need to have multiple runs at each level. 0 -1 0 1 Factor A 15 10 Yield Drop This leads to 0 error df, and untestable effects. 5 5 0 -1 0 1 Factor A 21

Design Lot 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 Wafer 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 Nitride Sputter Ash Time Etch Time Etch Time 0 0 0 -1 1 -1 -1 1

1 -1 -1 1 1 -1 -1 1 -1 1 1 1 1 -1 -1 -1 1 1 -1 0 0 0 0 0 0 1 1 1 1 1 -1 1 -1 1 -1 1 1 -1 1 -1 -1 -1 1 -1 -1 -1 1 -1 -1 0 0 0 This design is a strip plot. Wafers are batched. Requires 20 wafers

in 2 lots of 10, but only 6 runs of each tool. 22 B=-1 B=+1 Visual Look A=+1 A=-1 A=-1 B=-1 B=+1 A=+1 23 Analysis DOE results: M2 ash time, N2 etch time, sputter etch time before barrier All chains are 360k M2 test results ---------------------------------------------------------------------------------------------------------------| Sput Ash Nit etch etch Yield: Yield: Yield: Yield: Yield med R med R med R med R time time time 225 nm 250 nm 275 nm 300 nm rating 225 nm 250 nm 275 nm 300 nm Wafer 225 250 275 300 225 250

275 300 1 60 60 6 82 91 91 100 87 1.02 0.57 0.48 0.43 2 50 70 3 95 100 95 100 97 0.99 0.57 0.47 0.4 3 50 70 9 82 91 100 100 89 1.1 0.57 0.49 0.45 4 50 50 9 64 91 95 100 81 1.17 0.57 0.5 0.45 5 70 50

3 50 100 91 100 78 1.12 0.62 0.48 0.43 6 70 50 9 55 86 95 91 75 1.15 0.57 0.49 0.43 7 70 70 9 59 100 86 100 81 1.14 0.56 0.49 0.45 8 50 50 3 68 100 100 91 87 1.14 0.62 0.46 0.46 9 70 70 3 59 95 100 95

82 1.09 0.58 0.49 0.41 10 60 60 6 55 100 95 100 81 1.12 0.55 0.49 0.44 11 60 60 6 59 91 95 100 79 1.11 0.59 0.49 0.44 12 70 70 9 59 82 77 91 72 1.09 0.56 0.5 0.45 13 70 70 3 50 100 91 100 78 1.05 0.56 0.45 0.4

14 70 50 9 64 95 100 95 84 1.1 0.57 0.5 0.45 15 50 70 9 59 100 100 100 84 1.16 0.56 0.5 0.46 16 50 70 3 9 95 100 95 62 2.00E+05 0.64 0.47 0.41 17 50 50 9 23 100 100 100 69 1.07E+05 0.55 0.48 0.45 18 50 50 3 45 86 100

100 72 7.10E+05 0.61 0.49 0.43 19 70 50 3 50 100 95 95 79 1.15 0.6 0.49 0.43 20 60 60 6 50 95 100 95 78 1.05 0.57 0.49 0.43 The model is y A B C AB AC BC The strip plot design does not change effect calculations. 24 Testing effects In the CRD, the denominator of the Fstatistic for testing the main effects and two factor interactions is the residual. In the Strip Plot, there are restrictions on randomization, therefore, the error term for testing effects is not necessarily the residual. Source 1 2 3 4

5 6 7 8 9 10 11 Lot A A error (Lot*A) B B error (Lot*B) C C error (Lot*C) A*B A*C B*C residual df 1 1 1 1 1 1 1 1 1 1 10 Denominator for statistical tests complex A error B error C error residual residual residual 25 Testing effects The error term for testing all the effects at one process step is the LOT*EFFECT interaction. The error term for testing effects which cross process steps is the residual. 26 Considerations CRD more runs

less wafers wafers should not be batched together textbook analysis Strip plot less runs more wafers wafers can be batched more complex analysis Analyzing a strip plot as a CRD may lead to missing significant effects. 27 General considerations What about single wafer tools? Each wafer is a separate run. If the only thing defining a batch is the wafer handling, treat it as a single wafer tool. If the chamber needs to heat up or otherwise change before a batch is run, treat it as a batch tool. What about estimating variability from the past? R&D Engineers are looking for very large effects. they want to see these effects each and every time a process is run. What do you do when Things Go Horribly Wrong? graphs 28 Conclusions Experimentation in the wafer fab requires consideration of design structure execution structure Experiments with hard-to-vary factors are good candidates for split plot designs Experiments which cover multiple process steps are good candidates for strip plot designs 29